From 06f50ed77949cee495a1d8d98fec16648a5c8ea9 Mon Sep 17 00:00:00 2001 From: "Juan J. Martinez" Date: Mon, 15 May 2023 12:31:46 +0100 Subject: Added OPL3 support --- README.md | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'README.md') diff --git a/README.md b/README.md index f555daf..6380519 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,7 @@ TR8 is an 8-bit fantasy console inspired by MIPS, Z80 and 6502 real world CPUs. Display: 128 x 128 pixels 16 colors Memory: 64K CPU: TR-8, 4M VM instr/sec -Sound: TBD +Sound: OPL3 ``` Other features: @@ -65,6 +65,10 @@ You can then compile and run the example with `make example`. | --- | --- | --- | | 0xb0 | write | Blitter control | | 0xb1 | write | Blitter settings | +| 0xc0 | write | Sound register selector (primary) | +| 0xc1 | write | Sound data (primary) | +| 0xc2 | write | Sound register selector (secondary)| +| 0xc3 | write | Sound data (secondary) | | 0xf0 | read | Status of the controller 1 | | 0xf1 | read | Status of the controller 2 | @@ -169,6 +173,20 @@ Current palette (not final) is the default EGA 16 color palette: | 14 | `0xffff55` | | 15 | `0xffffff` | +### Sound: OPL3 + +TR8 includes an OPL3 emulator that can be conttolled using ports `0xc0` to +select register and `0xc1` to write data in the primary set of registers +(channels 0 to 8), and `0xc2` to select register and `0xc3` to write data in +the secondary set of registers (channels 9 to 17). + +There are a few good resources online on how to program this chip: + +* [Programming the AdLib/Sound Blaster FM Music Chips](http://www.shipbrook.net/jeff/sb.html) +* [Programmer's Guide to Yamaha YMF 262/OPL3 FM Music Synthesizer](https://www.fit.vutbr.cz/~arnost/opl/opl3.html) + +Also look at the example code in this repo for some simple sound drivers. + ### Frame interrupt When interrupts are enabled (IF not set), 60 times per second there will be a -- cgit v1.2.3