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author | Juan J. Martinez <jjm@usebox.net> | 2023-06-08 21:49:39 +0100 |
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committer | Juan J. Martinez <jjm@usebox.net> | 2023-06-08 21:49:39 +0100 |
commit | c5e314048afd1ba3f87204b0655af70f95ae7ab1 (patch) | |
tree | a6865eff98ff79293b7f88679e46c22b17b1f32a /src/vga.c | |
parent | 3e77771703d1be4d6ef363267caa15535ec333af (diff) | |
download | gold-mine-run-c5e314048afd1ba3f87204b0655af70f95ae7ab1.tar.gz gold-mine-run-c5e314048afd1ba3f87204b0655af70f95ae7ab1.zip |
Set VGA 320x200 256 col at 60Hz
Diffstat (limited to 'src/vga.c')
-rw-r--r-- | src/vga.c | 28 |
1 files changed, 28 insertions, 0 deletions
@@ -4,6 +4,7 @@ #include <dpmi.h> #include <sys/nearptr.h> #include <pc.h> +#include <dos.h> #include "vga.h" @@ -29,6 +30,33 @@ void set_mode(uint8_t mode) __dpmi_regs regs = { 0 }; regs.x.ax = mode; __dpmi_int(0x10, ®s); + + if (mode == 0x13) + { + /* setup the VGA: 320x200 @ 60Hz */ + /* from: https://gist.github.com/juj/34306e6da02a8a7043e393f01e013f24 */ + disable(); + + /* XXX: probably not neeed */ + wait_vsync(); + + outportw(0x3d4, 0x0011); /* Turn off write protect to CRTC registers */ + outportw(0x3d4, 0x0b06); /* New vertical total=525 lines, bits 0-7 */ + outportw(0x3d4, 0x3e07); /* New vertical total=525 lines, bits 8-9 */ + + outportw(0x3d4, 0xb910); /* Vsync start=scanline 185 */ + outportw(0x3d4, 0x8f12); /* Vertical display end=scanline 399, bits 0-7 */ + outportw(0x3d4, 0xb815); /* Vertical blanking start=scanline 440, bits 0-7 */ + outportw(0x3d4, 0xe216); /* Adjust vblank end position */ + outportw(0x3d4, 0x8511); /* Vsync length=2 lines + turn write protect back on */ + + /* XXX: probably not neeed */ + wait_vsync(); + + outportw(0x3d4, 0x2813); /* 8 pixel chars */ + outportw(0x3d4, 0x8e11); /* restore retrace */ + enable(); + } } void wait_vsync() |