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authorJuan J. Martinez <jjm@usebox.net>2023-05-18 12:18:24 +0100
committerJuan J. Martinez <jjm@usebox.net>2023-05-18 12:18:24 +0100
commitccf1ea4a34a789da326a321589c2757e5b1d749c (patch)
tree5ba1268d2a766a757787e29948113256b8903b01
parent2e1cf13e604121b9d1cb79ef7ca7a08b475eaadb (diff)
downloadtr8vm-ccf1ea4a34a789da326a321589c2757e5b1d749c.tar.gz
tr8vm-ccf1ea4a34a789da326a321589c2757e5b1d749c.zip
Formatting, project page
-rw-r--r--README.md124
1 files changed, 63 insertions, 61 deletions
diff --git a/README.md b/README.md
index 16f2bad..f555daf 100644
--- a/README.md
+++ b/README.md
@@ -284,29 +284,29 @@ branching instructions:
#### Assembler directives
-.org addr
+**.org addr**
Set the address to that value. By default the starting address is `0x0000`.
-.db imm [, imm]
+**.db imm [, imm]**
Literal byte. Label can be used with `<` prefix for the low byte of the address
and `>`for the high byte.
-.dw imm [, imm]
+**.dw imm [, imm]**
Literal word (16-bit value).
-.ds count, imm
+**.ds count, imm**
Generates `count` bytes with value `imm`.
-.equ id value
+**.equ id value**
Define an ID assigning a constant value. When the id is used, it will be replaced with its value.
-.include "filename"
+**.include "filename"**
Assemble the file at current position.
-.incbin "filename"
+**.incbin "filename"**
Read the file and add the content to the output at current position.
-.incpng "filename"
+**.incpng "filename"**
Read the PNG image and add the content to the output at current position. The
image colors will be matched with the TR8 palette and any non-matching color
will be condiered transparent and the index `128` will be used.
@@ -315,218 +315,218 @@ The blitter won't draw any pixel with index larger than 15.
#### Load and Store
-LD r1, r2
+**LD r1, r2**
Load the value of r2 in r1.
-LD r1, imm
+**LD r1, imm**
Load the immediate value in r1.
-LD [r1:r2], r3
+**LD [r1:r2], r3**
Load the value of r3 in the memory address provided by r1:r2.
-LD r3, [r1:r2]
+**LD r3, [r1:r2]**
Load into r3 the value in the memory address provided by r1:r2.
-LD [SP + imm], r1
+**LD [SP + imm], r1**
Load r1 into the stack on top address plus the immediate value.
-LD r1, [SP + imm]
+**LD r1, [SP + imm]**
Load into r1 the stack value on top address plus the immediate value.
#### Stack
-PUSH r1
+**PUSH r1**
Save the value of r1 on the top of the stack.
-POP r1
+**POP r1**
Restore the value of r1 by popping it from the top of the stack.
-PUSH F
+**PUSH F**
Save the flags in the stack.
-POP F
+**POP F**
Restore the flags from the top of the stack.
-XSP r1
+**XSP r1**
Exchange the high byte of the stack pointer by the value in r1.
#### Logical
-AND r1, r2
+**AND r1, r2**
Logical AND between r1 and r2, storing the result in r1.
Affected flags: ZF, SF
-AND r1, imm
+**AND r1, imm**
Logical AND between r1 and immediate value, storing the result in r1.
Affected flags: ZF, SF
-OR r1, r2
+**OR r1, r2**
Logical OR between r1 and r2, storing the result in r1.
Affected flags: ZF, SF
-OR r1, imm
+**OR r1, imm**
Logical OR between r1 and immediate value, storing the result in r1.
Affected flags: ZF, SF
-XOR r1, r2
+**XOR r1, r2**
Logical exclusive OR between r1 and r2, storing the result in r1.
Affected flags: ZF, SF
-XOR r1, imm
+**XOR r1, imm**
Logical exclusive OR between r1 and immediate value, storing the result in r1.
Affected flags: ZF, SF
#### Arithmetic
-INC r1
+**INC r1**
Incremet r1.
Affected flags: ZF, CF, OF, SF
-DEC r1
+**DEC r1**
Decrement r1.
Affected flags: ZF, CF, OF, SF
-ADD r1, r2
+**ADD r1, r2**
Add r1 and r2, storing the result in r1.
Affected flags: ZF, CF, OF, SF
-ADD r1, imm
+**ADD r1, imm**
Add r1 and the immediate value, storing the result in r1.
Affected flags: ZF, CF, OF, SF
-SUB r1, r2
+**SUB r1, r2**
Subtract r2 to r1, storing the result in r1.
Affected flags: ZF, CF, OF, SF
-SUB r1, imm
+**SUB r1, imm**
Subtract the immediate value to r1, storing the result in r1.
Affected flags: ZF, CF, OF, SF
-CMP r1, r2
+**CMP r1, r2**
Perform a SUB of r1 minus r2, without storing the result and only updating the
flags.
Affected flags: ZF, CF, OF, SF
-CMP r1, imm
+**CMP r1, imm**
Perform a SUB of r1 minus the immediate value without storing the result and
only updating the flags.
Affected flags: ZF, CF, OF, SF
#### Bit Operations
-SHL r1, n
+**SHL r1, n**
Shift r1 n bits to the left (0 to 7), storing the result in r1.
Affected flags: ZF, CF, SF
-SHR r1, n
+**SHR r1, n**
Shift r1 n bits to the right (0 to 7), storing the result in r1.
Affected flags: ZF, CF, SF
-ROL r1, n
+**ROL r1, n**
Rotate r1 n bits to the left (0 to 7), storing the result in r1.
Affected flags: ZF, CF, SF
-ROR r1, n
+**ROR r1, n**
Rotate r1 n bits to the right (0 to 7), storing the result in r1.
Affected flags: ZF, CF, SF
-BIT r1, n
+**BIT r1, n**
Test bit n (0 to 7) or r1, setting ZF if it is set or clearing it otherwise.
Affected flags: ZF
#### Jump and Call
-JMP addr
+**JMP addr**
Set the PC to the 16-bit address.
-CALL addr
+**CALL addr**
Store the next PC in the stack (16-bit address) and sets the PC to the 16-bit
address.
-CALL [r1:r2]
+**CALL [r1:r2]**
Store the next PC in the stack (16-bit address) and sets te PC to the 16-bit
address provided by r1:r2.
-RET
+**RET**
Return from a call by setting PC to the top 16-bit value popped from the stack.
#### Branching
-BZ inst
+**BZ inst**
Branch if Zero, will run the next instruction if ZF is set.
Affected flags: BF
-BNZ inst
+**BNZ inst**
Branch if not Zero, will run the next instruction if ZF flag is not set.
Affected flags: BF
-BC inst
+**BC inst**
Branch if Carry, will run the next instruction if CF flag is set.
Affected flags: BF
-BNC inst
+**BNC inst**
Branch if not Carry, will run the next instruction if CF flag is not set.
Affected flags: BF
-BO inst
+**BO inst**
Branch if Overflow, will run the next instruction if OF flag is set.
Affected flags: BF
-BNO inst
+**BNO inst**
Branch if not Overflow, will run the next instruction if OF flag is not set.
Affected flags: BF
-BS inst
+**BS inst**
Branch if Sign, will run the next instruction if SF flag is set.
Affected flags: BF
-BNS inst
+**BNS inst**
Branch if not Sign, will run the next instruction if SF flag is set.
Affected flags: BF
-BI inst
+**BI inst**
Branch if Interrupt, will run the next instruction if IF flag is set.
Affected flags: BF
-BNI inst
+**BNI inst**
Branch if not Interrupt, will run the next instruction if IF flag is not set.
Affected flags: BF
#### IO, flags and Misc
-HALT
+**HALT**
Stop the execution until there is frame interrupt. If the interruption flag is
set, this will hang the CPU.
-PORT r1, r2
+**PORT r1, r2**
Write the value of r2 in the port number provided by r1. If there is an output,
the value will be stored in r1.
-NOP
+**NOP**
No instruction has no effect.
-SIF
+**SIF**
Set IF, disabling the interrupt.
Affected flags: IF
-CIF
+**CIF**
Clear IF, enabling the interrupt. If called in an interrupt handler, it won't
have effect. Use IRET instead to return from the interrupt.
Affected flags: IF
-CCF
+**CCF**
Clear carry flag.
Affected flags: CF
-SCF
+**SCF**
Set carry flag.
Affected flags: CF
-COF
+**COF**
Clear overflow flag.
Affected flags: OF
-IRET
+**IRET**
Return from an interrupt handler by restoring F and PC from the stack.
Affected flags: IF
@@ -546,3 +546,5 @@ This was made by [Juan J. Martinez](https://www.usebox.net/jjm/about/me/).
The code is MIT licensed.
+Project website: https://git.usebox.net/tr8vm/about/
+