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authorJuan J. Martinez <jjm@usebox.net>2023-05-23 16:06:46 +0100
committerJuan J. Martinez <jjm@usebox.net>2023-05-23 16:08:48 +0100
commitc5dd4897e4d7f45108b6955bebf2d4b5f22a3652 (patch)
treea85d5b933fe2dccf57dd476194a27b0f5d99becd /README.md
parent5584f79fff0fdfc8e4430eea3867c729b82f4152 (diff)
downloadtr8vm-c5dd4897e4d7f45108b6955bebf2d4b5f22a3652.tar.gz
tr8vm-c5dd4897e4d7f45108b6955bebf2d4b5f22a3652.zip
Add cmpi, cmpd, ldi and ldd
Diffstat (limited to 'README.md')
-rw-r--r--README.md27
1 files changed, 26 insertions, 1 deletions
diff --git a/README.md b/README.md
index f17875a..82eca95 100644
--- a/README.md
+++ b/README.md
@@ -225,7 +225,8 @@ A label is defined as an ID that ends in `:`.
All the instructions are 16-bit, with the exception of `JMP addr` and `CALL
addr` that use an extra 16-bit parameter for "addr". All the instructions take
-the same time to run, and being 4 MIPS it can fit `66666` instructions in a
+the same time to run (with the exception of `cmpi`, `cmpd`, `ldi` and `ldd`
+that take extra time), and being 4 MIPS it can fit `66666` instructions in a
frame (at 60Hz).
There are no 16-bit registers, but they can be implemented with 2 registers,
@@ -336,6 +337,16 @@ Load r1 into the stack on top address plus the immediate value.
**LD r1, [SP + imm]**
Load into r1 the stack value on top address plus the immediate value.
+**LDI**
+Perform a LD of [a : x] to [b : y], and increments x (and a if x overflows) and
+y (and b if x overflows). This instruction takes 4 times longer than a regular
+instruction.
+
+**LDD**
+Perform a LD of [a : x] to [b : y], and decrements x (and a if x overflows)
+and y (and b if x overflows). This instruction takes 4 times longer than a regular
+instruction.
+
#### Stack
**PUSH r1**
@@ -415,6 +426,20 @@ Perform a SUB of r1 minus the immediate value without storing the result and
only updating the flags.
Affected flags: ZF, CF, OF, SF
+**CMPI**
+Perform a SUB of [a : x] minus [b : y], without storing the result and only
+updating the flags. It also increments x (and a if x overflows) and y (and b if x
+overflows). The flags are not affected by incrementing a, b, x and y. This
+instruction takes 4 times longer than a regular instruction.
+Affected flags: ZF, CF, OF, SF
+
+**CMPD**
+Perform a SUB of [a : x] minus [b : y], without storing the result and only
+updating the flags. It also decrements x (and a if x overflows) and y (and b if
+x overflows). The flags are not affected by decrementing a, b, x and y. This
+instruction takes 4 times longer than a regular instruction.
+Affected flags: ZF, CF, OF, SF
+
#### Bit Operations
**SHL r1, n**